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    <abstract>Modern GPUs evolve rapidly, yet production compilers still rely on hand-crafted register allocation heuristics that require substantial re-tuning for each hardware generation. We introduce VeriLocc, a framework that combines large language models (LLMs) with formal compiler techniques to enable generalizable and verifiable register allocation across GPU architectures. VeriLocc fine-tunes an LLM to translate intermediate representations (MIRs) into target-specific register assignments, aided by static analysis for cross-architecture normalization and generalization and a verifier-guided regeneration loop to ensure correctness. Evaluated on matrix multiplication (GEMM) and multi-head attention (MHA), VeriLocc achieves 85–99% single-shot accuracy and near-100% pass@100. Case study shows that VeriLocc discovers more performant assignments than expert-tuned libraries, outperforming rocBLAS by over 10% in runtime.</abstract>
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%0 Conference Proceedings
%T VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM
%A Jin, Lesheng
%A Ruan, Zhenyuan
%A Mai, Haohui
%A Shang, Jingbo
%Y Christodoulopoulos, Christos
%Y Chakraborty, Tanmoy
%Y Rose, Carolyn
%Y Peng, Violet
%S Proceedings of the 2025 Conference on Empirical Methods in Natural Language Processing
%D 2025
%8 November
%I Association for Computational Linguistics
%C Suzhou, China
%@ 979-8-89176-332-6
%F jin-etal-2025-verilocc
%X Modern GPUs evolve rapidly, yet production compilers still rely on hand-crafted register allocation heuristics that require substantial re-tuning for each hardware generation. We introduce VeriLocc, a framework that combines large language models (LLMs) with formal compiler techniques to enable generalizable and verifiable register allocation across GPU architectures. VeriLocc fine-tunes an LLM to translate intermediate representations (MIRs) into target-specific register assignments, aided by static analysis for cross-architecture normalization and generalization and a verifier-guided regeneration loop to ensure correctness. Evaluated on matrix multiplication (GEMM) and multi-head attention (MHA), VeriLocc achieves 85–99% single-shot accuracy and near-100% pass@100. Case study shows that VeriLocc discovers more performant assignments than expert-tuned libraries, outperforming rocBLAS by over 10% in runtime.
%U https://aclanthology.org/2025.emnlp-main.1538/
%P 30240-30250

Markdown (Informal)

[VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM](https://aclanthology.org/2025.emnlp-main.1538/) (Jin et al., EMNLP 2025)

• VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM (Jin et al., EMNLP 2025)

ACL

• Lesheng Jin, Zhenyuan Ruan, Haohui Mai, and Jingbo Shang. 2025. VeriLocc: End-to-End Cross-Architecture Register Allocation via LLM. In Proceedings of the 2025 Conference on Empirical Methods in Natural Language Processing, pages 30240–30250, Suzhou, China. Association for Computational Linguistics.